HIGH PERFORMANCE BUFFERS

High-performance LVCMOS or/and Differential fanout clock buffer with low additive phase jitter of only 50 fs RMS and up to 10 outputs. Different synchronous glitch-free output enable (OE) function to eliminate potential intermediate incorrect output clock cycles when enabling or disabling outputs. Products are available from a 1.8 V to 3.3 V supply voltage.

For some products the output drivers of each bank can be independently programmed to LVPECL, LVDS, HCSL or HIZ mode. The LVCMOS clock output.

The low-jitter fanout clock buffer family supports frequencies up to 2.1 GHz. It is ideal for low-jitter, high-frequency clock/data distribution and level translation applications.